Senior Algorithm Engineer - Error Correction Codes for Optical Communication Systems
Visa Sponsorship
Remote
AI Summary
Design and develop error correction code algorithms for optical communication systems. Collaborate with cross-functional teams to bring innovative DSP architectures to life. Develop and optimize ECC algorithms for 800Gbps and 1600Gbps data rates.
Key Highlights
Design and simulate ECC architectures
Develop and optimize Error Correction Code algorithms
Collaborate with digital and firmware teams
Translate MATLAB-level designs into hardware-efficient RTL-compatible implementations
Technical Skills Required
Benefits & Perks
Competitive base salary
Equity (4-year vesting)
Benefits
H1-B sponsorship available
Relocation assistance (may be considered)
Remote work option
Job Description
Senior Algorithm Engineer – Error Correction Codes (ECC) | Optical Communication | Remote (US)
Location: Fully Remote (US-based) – Preferred near Austin, TX or San Francisco Bay Area
Employment Type: Full-Time | Sponsorship Available (H1-B)
Compensation: Competitive Base + Equity (4-year vesting) + Benefits
Interview Process: 3 Rounds | ~2 Weeks
About The Client
Our client is a Series-D semiconductor innovator revolutionizing cloud and AI infrastructure with cutting-edge programmable coherent DSP (Digital Signal Processing) solutions. Their technology enables faster and more efficient optical data transmission within and between AI data centres — forming the backbone of next-generation AI connectivity.
Backed by world-class investors including Kleiner Perkins, Spark Capital, Mayfield, and Fidelity Investments, the company recently emerged from stealth with $180MM in funding and is scaling rapidly.
About The Role
We are seeking a Senior Algorithm Engineer with deep expertise in Error Correction Codes (ECC) for optical communication systems. In this role, you will join the R&D team developing next-generation coherent optical transceivers delivering 800Gbps and 1600Gbps data rates.
You will design, simulate, and optimize ECC algorithms, collaborate across system, VLSI, firmware, and verification teams, and help bring innovative DSP architectures to life.
Key Responsibilities
- Design and simulate ECC architectures; define performance requirements and specifications for digital and firmware design teams.
- Develop and optimize Error Correction Code algorithms (OFEC preferred) and integrate them into MODEM simulations.
- Collaborate with digital and firmware teams for system bring-up, validation, and optimization.
- Translate MATLAB-level designs into hardware-efficient RTL-compatible implementations.
- Contribute to cross-functional reviews ensuring algorithmic feasibility and efficiency.
- Perform lab debugging, analysis, and fine-tuning of algorithms in real-world environments.
- 5+ years of hands-on experience in ECC algorithm design and development in a hardware implementation context.
- Proven track record in Optical Communication Systems or High-Speed Data Transmission.
- Proficiency in MATLAB and C for algorithm modelling and fixed-point design.
- Strong understanding of hardware and system-level constraints from MATLAB to RTL.
- Practical lab experience with algorithm validation, debugging, and tuning.
- Corporate/industry experience (academic-only backgrounds not accepted).
- Demonstrated job stability — consistent roles with progressive responsibilities.
- Experience with OFEC (Open Forward Error Correction) — LDPC alone may not suffice.
- Exposure to DSP architectures and coherent optical transceivers.
- Experience collaborating with VLSI, firmware, and system design teams.
Candidates currently or previously employed with leading semiconductor and optical companies such as:
Acacia Communications, Ayar Labs, Broadcom, Ciena, Infinera, Intel, Marvell, Nvidia, AMD, Lumentum, Ciena, Skyworks, TSMC, Texas Instruments, Analog Devices, Applied Materials, Synopsys, Cadence, GlobalFoundries, Samsung, Qualcomm, MediaTek, Lightmatter, Lam Research, Onsemi, Infineon, STMicroelectronics, and others.
Additional Details
- Visa Sponsorship: H1-B sponsorship available.
- Equity: Included (4-year vesting).
- Relocation: May be considered based on candidate background.
- Client Name: Confidential (disclosed later in process).