Senior RTL Design Engineer / Digital IC Engineer (AI Hardware)
Join a deep-tech startup designing next-generation AI processors in Paris. Work on complex SoCs, microarchitecture, and advanced compute problems. Require 5+ years of RTL design experience with Verilog/SystemVerilog.
Key Highlights
Key Responsibilities
Technical Skills Required
Benefits & Perks
Nice to Have
Job Description
I’m working with a deep-tech startup hiring a Senior RTL Design Engineer / Digital IC Engineer in Paris. The company is building next-generation AI hardware and is looking for engineers with strong experience in RTL design, microarchitecture, and complex SoC development.
This is an opportunity to join an early-stage team designing advanced processors at the intersection of semiconductors, AI, and photonics, with engineers working close to architecture on challenging compute problems.
Key requirements
- 5+ years of experience in Digital IC Design or RTL Design
- Strong experience with Verilog / SystemVerilog
- Experience designing block-level and top-level RTL
- Background working on complex SoCs including components such as DSP, DDR / LPDDR / HBM, or PCIe
- Familiarity with AMBA protocols including AXI, AXI-Stream, ACE, ACE-Lite, APB, and AHB
- Experience with logic synthesis, DFT (Design for Test), and physical awareness (PPA)
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- Scripting experience in Tcl, Perl, or Python
- Strong understanding of SoC integration and high-performance digital systems
- Work on next-generation AI processor architectures
- Join a small team solving complex AI compute challenges
- Opportunity to influence microarchitecture and digital design
- Visa sponsorship and relocation support available
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For more information, contact Steph Hutchinson.
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