Senior Design Engineer

Founded in 2016, we are a Series C semiconductor startup with over $300M in funding, developing a next-generation processor designed to unify traditionally separate computing domains-AI, HPC, and cloud workloads-into a single architecture that significantly enhances performance and energy efficiency.

We are actively hiring Senior Design Engineers who are either local or open to relocating to the Bay Area or Las Vegas, with the expectation of working onsite in a hybrid capacity. Our processor is currently in the final stages of design, with tape-out anticipated soon and commercial availability projected within the next couple of years. The architecture features a multi-chiplet design with hundreds of cores per chiplet, and early benchmarks suggest performance gains far exceeding those of today's leading processors.

We're looking for engineers with expertise in any of the following areas:

Processor & Architecture Expertise

• Deep knowledge of ARM and x86 architectures, multicore and multiprocessor systems, including consistency protocols and coherence mechanisms
• Strong understanding of computer architecture, pipeline design, and high-speed, low-power processor pipelines for ASICs, SoCs, and multi-core systems
• Experience with high-performance L2 cache units, cache controller design, cache hierarchy, and coherency protocols
• Familiarity with microprocessor cache systems and embedded logic analyzers
• Background in large-scale ASIC design and low-power logic design using deep submicron technologies
  
  

Digital & RTL Design Flow

• Proficiency in digital design from architecture through RTL, verification, synthesis, and static timing analysis (STA)
• Skilled in Verilog/SystemVerilog, CDC, LINT, and synthesis tools
  
  

FPGA & Protocol Integration

• Experience with FPGA design, architectural concept development, integration, and debugging
• Strong familiarity with protocols such as PCIe, Ethernet (100G+), and DDR4
  
  

Specialized Functional Units & Algorithms

• Experience designing Arithmetic Logic Units (ALUs) with a focus on high-speed processor pipelines
• Expertise in fetch unit architecture for both general-purpose and AI processing needs
• Knowledge of branch prediction algorithms and instruction fetch design for high-performance microprocessors
• Hands-on experience implementing, debugging, and optimizing high-performance MMU/TLB subsystems for advanced processor architectures
  
  

Memory Interface & Error Correction

• Background in DRAM interface design and advanced DRAM control block enhancements
• Experience with RS and BCH error correction codes
  
  

Benefits

• Competitive salary and benefits package + stock options
• Relocation assistance
• Opportunities for professional development and advancement
• International environment and further career progression
• Getting in touch with bleeding-edge technology
• Flexible working hours with work-life balance
• Collaborative and supportive work environment
• Ability to work from home (must reside in the Bay Area or Las Vegas to meet with the team as needed)
  
  

Email Your Resume In Word To

Looking forward to receiving your resume through our website and going over the position with you. Clicking apply is the best way to apply, but you may also:

caroline.veillon@cybercoders.com

• Please do NOT change the email subject line in any way. You must keep the JobID: linkedin : CV5-1699546 -- in the email subject line for your application to be considered.***
  
  

Caroline Veillon - Lead Recruiter

Employer is willing to sponsor qualified candidates for a non-immigrant work visa.

CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance.

This job was first posted by CyberCoders on 08/10/2022 and applications will be accepted on an ongoing basis until the position is filled or closed.

CyberCoders is proud to be an Equal Opportunity Employer

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. Individuals needing special assistance or an accommodation while seeking employment can contact a member of our Human Resources team at Benefits@CyberCoders.com to make arrangements.