Senior Analog Mixed-Signal Design Engineer

mdaedge Singapore
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AI Summary

Lead the development of next-generation automated design flows and tools. Contribute to defining and improving design infrastructure, methodologies, and workflows. Collaborate with analog design engineers, foundry teams, and EDA vendors.

Key Highlights
Lead automated design flows and tools development
Contribute to design infrastructure and methodologies
Collaborate with analog design engineers and foundry teams
Technical Skills Required
Cadence Virtuoso Synopsys Custom Compiler Cadence Quantus Siemens Calibre TCL Python Perl SKILL
Benefits & Perks
Annual Salary Range: SGD 120,000 – 150,000
Relocation: International relocation available
Compensation: Base salary + variable bonus + RSUs

Job Description


  • Work Location: Singapore (onsite, 5 days per week)
  • Annual Salary Range: SGD 120,000 – 150,000
  • Relocation: International relocation available
  • Compensation: Base salary + variable bonus + RSUs
  • Work Authorization: Sponsorship available

Role Overview:

  • Lead the development of next-generation automated design flows and tools within the central engineering team.
  • Contribute to defining and improving the design infrastructure, methodologies, and workflows across the organization.
  • Collaborate with analog design engineers, foundry teams, and EDA vendors to enhance design efficiency and accuracy.

Key Responsibilities:

  • Set up, maintain, and support Process Design Kits (PDKs) for CMOS FinFET and BiCMOS high-speed design projects.
  • Work closely with analog and mixed-signal design teams to resolve CAD and design flow-related issues.
  • Collaborate with TCAD and foundry technology teams on parasitic extraction, physical verification, and EMIR topics.
  • Evaluate and benchmark analog/mixed-signal (AMS) design tools and present results to design teams.
  • Define, develop, and validate custom circuit checks and model QA flows.
  • Create automation scripts to improve design and verification team productivity.

Required Qualifications:

  • Bachelor's degree in Electrical Engineering with 8–10 years of related experience, or Master's/PhD with 3–5 years of experience.
  • Proven experience setting up and maintaining analog/mixed-signal design flows for advanced FinFET technologies.
  • Strong knowledge of CAD and EDA tools, including Cadence Virtuoso and Synopsys Custom Compiler.
  • Proficient with extraction tools (e.g., Cadence Quantus) and physical verification tools (e.g., Siemens Calibre).
  • Understanding of AMS simulation tools such as ADE, AMS Designer, Spectre, PrimeSim, and AFS.
  • Expertise in end-to-end AMS flows, including schematic entry, extraction, EMIR, physical verification, and post-layout simulations.
  • Programming skills in scripting languages like TCL, Python, Perl, or SKILL.
  • Excellent communication skills and ability to work effectively in cross-functional, global teams.

Must-Have Skills:

  • Analog Mixed-Signal (AMS) Design.
  • PDK (Process Design Kit) Development and Support.
  • Experience in at least two of the following: Physical Verification, Extraction, or EMIR.

Preferred Skills:

  • Background in the semiconductor industry.
  • Familiarity with advanced process technologies and PDK development.
  • Experience contributing to automation, modeling, or verification flow improvements.

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